1. Field of the Invention
The present invention relates to a thyristor with an insulated gate.
2. Description of the Related Art
In future, as a power device, there will be mainly used a power IC having a driving circuit and a protection circuit, which are integrally formed in the power device with a high breakdown voltage and a large current. A thyristor of the voltage control type using an insulted gate electrode (MOS gate) is suitable for gate driving in such a power device since gate driving can be performed by a small current as compared with the thyristor of the current driving type.
FIG. 25 shows the structure of a turn-off insulated gate in the conventional thyristor of the insulated gate type. A p-type base layer 2 is formed on one surface of an n-type base layer 1 having high resistance. An n-type emitter layer 3 is formed in the p-type base layer 2. A p-type emitter layer 4 is formed on the other surface of the n-type base layer 1. A cathode electrode 5 is formed on the n-type emitter layer 3 and an anode electrode 6 is formed on the p-type emitter layer 4.
An n-type drain layer 7 is formed at the position, which is away from the n-type emitter layer 3 at a predetermined distance. A gate electrode 10 is formed on the p-type base layer 2 via a gate insulating film 9, and between the n-type drain layer 7 and the n-type cathode layer 3. The gate electrode 10 is used for turn-off and comprises an n channel MOSFET in which the n-type emitter layer is used as a source. A drain electrode 8 is formed in contact with the p-type base layer 2, and the p-type base layer 2 and the n-type drain layer 7 are short-circuited by the drain electrode 8.
A gate electrode for turn-on (not shown) is formed at a peripheral portion of the p-type base layer 2, which is selectively diffused, and comprises a MOS structure similar to the gate electrode for turn-off.
According to the above-structured thyristor of the insulated gate type, a positive voltage with respect to the cathode is applied to the insulated gate electrode 10 at the time of turn-off. Thereby, an n-channel is formed under the gate electrode 10. Then, hole current, which has directly flowed into the n-type emitter layer 3 from the p-type base layer 2, changes its passages and flows into the drain electrode 8 as shown by a broken line, and passes through the n-type drain layer 7 and the portion under the gate electrode 10. Thus, the hole current is bypassed to the cathode electrode 5 from the n-type emitter layer 3. By the bypass of the hole current, injection of electrons to the p-type base layer 2 from the n-type emitter layer 3 is stopped, and the device is turned off.
In the conventional thyristor with the insulated gate, there is a problem in that sufficient turn-off capability cannot be obtained. This is due to resistance of a hole current bypass passage shown in FIG. 25. As resistance of the hole current bypass passage, there are mainly horizontal resistance of the p-type base layer 2 and on-resistance of the channel under the insulated gate electrode 10. If a voltage drop, which is determined by these resistance and the bypass current, becomes higher than a built-in voltage between the n-type emitter layer 3 and the p-type base layer 2, injection of electrons from the n-type emitter layer 3 is not stopped. Due to this, if the main current increases, the device cannot be turned off.
Among the integrated circuits (ICs) in which a plurality of semiconductor elements are integrated on one semiconductor substrate, an IC having high breakdown voltage is called a power IC. The power IC such as a power MOSFET, IGBT, etc., including a MOS gate, which is generally used as a high breakdown device has normally a DSA (diffusion self-alignment) structure to from a channel portion. This is a method in which a source diffusion layer and a channel diffusion layer having polarity opposite to each other are formed by using one end surface of the same polysilicon gate electrode as a diffusion window.
FIG. 39 shows a cross section of a horizontal type power MOSFET manufactured by the conventional technique. First, a polysilicon film, serving as a gate electrode 32, is used as a mask, and impurity is diffused into an n-type substrate 31 from the left side of position A to form a p-type channel layer 33. Then, impurity is diffused into the p channel layer 33 from the same place to form an n-type diffusion layer 34 serving as a source. At the same time, an n-type diffusion layer 35, serving as a drain, is formed by diffusion. Thereby, the horizontal power MOSFET is formed as shown in the drawing.
In the power IC, a low breakdown voltage device such as a CMOS for forming a logic circuit must be formed on the same substrate on which the high breakdown voltage device is formed. FIG. 40 shows a cross section of a low breakdown voltage MOSFET of n-channel type. First, a p-type well diffusion layer 36 is formed on the same n-type substrate 31 where the high breakdown voltage device is formed. Then, a polysilicon film, serving as a gate electrode 37, is used as a mask, and n-type diffusion layers 38 and 39, serving as a source and a drain, are formed on both sides. Thereby, the low breakdown voltage MOSFET is formed as shown in the drawing.
In the manufacturing process of the above high breakdown device and the low breakdown device, both p-type channel layer 33 of the high breakdown voltage device and p-type well diffusion layer 36 of the low breakdown voltage device are diffusion layers for forming a channel portion. It is, however, needed that these layers be formed in a different process for the following reason.
That is, the p-type channel of the high breakdown voltage device uses a horizontal diffusion region of the diffusion layer, and the p-type channel of the low breakdown voltage device uses a vertical diffusion region of the diffusion layer. Due to this, the layers 33 and 36 are basically different from each other in the amount of implant dose. Moreover, since the p-type channel of the high breakdown voltage device uses the horizontal diffusion region of the diffusion layer 33, the channel length L is determined by the depth of the diffusion. Due to this, it is needed that the diffusion depth in the high breakdown voltage device be independently designed of that in the low breakdown voltage device.
In the conventional horizontal type high breakdown voltage device used in the power IC, there is a problem in that the manufacturing process thereof is independent of that of the low breakdown voltage device to be simultaneously integrated, and the manufacturing process becomes complicated so as to integrate both devices on one chip.